1. general description the 74hc7541-q100; 74hct7541-q100 is an 8-bit buffer/line driver with schmitt-trigger inputs and 3-state outputs. the device features two output enables (oe 1 and oe 2). a high on oe n causes the outputs to assume a high -impedance off-state. inputs include clamp diodes that enable the use of current limit ing resistors to interfac e inputs to voltages in excess of v cc . schmitt trigger inputs transform slowly changing input signals into sharply defined jitter-free output signals. this product has been qualified to the automotive electronics council (aec) standard q100 (grade 1) and is suitable for use in automotive applications. 2. features and benefits ? automotive product qualif ication in accordance with aec-q100 (grade 1) ? specified from ? 40 ? c to +85 ? c and from ? 40 ? c to +125 ? c ? non-inverting outputs ? low-power dissipation ? input levels: ? for 74hc7541-q100: cmos level ? for 74hct7541-q100: ttl level ? complies with jedec standard no. 7a ? esd protection: ? mil-std-883, method 3015 exceeds 2000 v ? hbm jesd22-a114f exceeds 2000 v ? mm jesd22-a115-a exceeds 200 v (c = 200 pf, r = 0 ? ) ? multiple package options 3. ordering information 74hc7541-q100; 74hct7541-q100 octal schmitt trigger buffer/line driver; 3-state rev. 1 ? 24 march 2014 product data sheet table 1. ordering information type number package temperature range name description version 74hc7541d-q100 ? 40 ? c to +125 ? c so20 plastic small outline package; 20 leads; body width 7.5 mm sot163-1 74hct7541d-q100 74hc7541pw-q100 ? 40 ? cto+125 ? c tssop20 plastic thin shrink small outline package; 20 leads; body width 4.4 mm sot360-1 74HCT7541PW-Q100
74hc_hct7541_q100 all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2014. all rights reserved. product data sheet rev. 1 ? 24 march 2014 2 of 15 nxp semiconductors 74hc74541-q100; 74hct7541-q100 octal schmitt trigger buffe r/line driver; 3-state 4. functional diagram 5. pinning information 5.1 pinning fig 1. logic symbol fig 2. iec logic symbol aaa-000084 21 8 y0 y1 y2 y3 y4 y5 y6 y7 17 16 15 14 13 12 11 a0 a1 a2 a3 a4 a5 a6 a7 3 4 5 6 7 8 1 oe1 oe2 19 9 aaa-000085 9 11 12 13 14 15 16 2 3 4 5 6 7 8 18 17 19 1 & en fig 3. pin configuration so20 fig 4. pin configuration tssop20 + & |